Ground bounce in digital VLSI circuits
نویسندگان
چکیده
منابع مشابه
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits
of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the buffer propagation delay and the optimum taper factor is discussed and a mathematical relationship for total p...
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عنوان ژورنال:
- IEEE Trans. VLSI Syst.
دوره 11 شماره
صفحات -
تاریخ انتشار 2003